1. Field of the Invention
The present invention relates to a gate driving circuit and a display apparatus including the gate driving circuit. More particularly, the present invention relates to a gate driving circuit, which may have improved reliability at high temperatures, and a display apparatus including the gate driving circuit.
2. Discussion of the Background
In general, a liquid crystal display device includes a liquid crystal display panel having a lower substrate, an upper substrate facing the lower substrate, and a liquid crystal layer interposed between the lower substrate and the upper substrate, which displays an image.
The liquid crystal display panel includes a plurality of gate lines, a plurality of data lines, and a plurality of pixels connected to the gate lines and the data lines, which are formed on the liquid crystal display panel. A gate driving circuit may be directly formed on the liquid crystal display panel through a thin film process and sequentially outputs a gate signal to the gate lines.
Generally, a gate driving circuit includes a shift register in which a plurality of stages are connected in series to each other. That is, each stage includes a plurality of driving transistors, which apply a gate voltage to corresponding gate lines. Specifically, each stage includes a pull-up transistor connected to a gate line to output a gate voltage and a carry transistor connected to an input terminal of a next stage to output a carry voltage that is used to control the drive of the next stage. Therefore, the gate driving circuit may prevent distorted signals caused by a load connected to the gate line from being applied to the next stage, thereby preventing malfunction thereof.
Control terminals of the pull-up transistor and the carry transistor are commonly connected to a Q-node in each stage. Thus, the Q-node has an electric potential of a turn-off voltage that is lower than a threshold voltage during a (n−1)H period where a gate voltage and a carry voltage are maintained at a low state, while the Q-node has an electric potential of a turn-on voltage that is higher than the threshold voltage during a 1H period where the gate voltage and the carry voltage are maintained at a high state.
However, a Q-node is generally connected to a previous carry node during a predetermined period within a (n−1)H period and an electric potential of the Q-node is floated. Thus, the pull-up transistor and the carry transistor are not held in a turn-off state, which results in rippling of the gate voltage and the carry voltage. Particularly, when current characteristics of the pull-up transistor and the carry transistor are varied while a liquid crystal display panel is tested at high temperatures, the reliability of the gate driving circuit may deteriorate due to noise being applied through the Q-node in a floating state.
When the Q-node is connected to the previous carry node and the electric potential of the Q-node is reversely applied to the previous carry node, a ripple may occur in the previous carry node. Since the previous carry node is connected to an input terminal of a present stage, the ripple generated in the previous carry node applies an abnormal input signal to the present stage, thereby causing a malfunction of the present stage.